If PCB layout was nothing more than getting the schematic realized by point to point connections there would be no need for signal integrity. Unfortunately, issues of crosstalk, ground and supply bounce, intersymbol interference, multicrossing errors, non-monotonicity, jitter, noise, oscillation, delay errors, ringing, ringback, threshold errors, undershoot, settling behavior and skew abound. Sunman Engineering is dedicated to satisfying the need for our designs to work the first time out.

To expedite the end goal of a working design SunMan Engineering has developed a methodology to streamline the scope of work required:

Step 1: NetList
Steps Simulating each node associated with a design is unnecessary. Simulation effort can be reduced by listing nodes critical to the success of the design. By identifying potential sources of noise and categorizing them in terms of their affect on performance the scope of the signal integrity process can be limited.

Goal: Consensus on which nodes need simulation:

  • Data Lines
  • Address Lines
  • Control Lines
  • Clocks
  • Ground / Power
Step 2: Topology
Steps Choices that affect the physical size and location of components has a large bearing on what needs to be accomplished from the standpoint of signal integrity. Trade-offs are always made between the need to reduce the distance between devices requiring to communicate and the need to satisfy all the connections called out in the schematic. Based on those nodes deemed critical from Step 1, a consensus is made between the client and SunMan to optimize the design for critical issues.

Goal: Agreement on issues affecting choices in geometry:

  • Power and Ground Entrance and Distribution
  • Decoupling and Filtering Strategy
  • I/O Location # I/O Pin Allocation
  • Clock Location # Terminators
  • Point-to-Point vs. Differential Traces
  • And more
Step 3: What to Simulate & Tools Selection
  • Does the solution require a single board, multi-board, or system level simulation?
  • Is the customer looking for a pre- or post-route evaluation?
  • Are there “What if?” questions?
  • Is a Monte-Carlo required on critical traces?

Goal: Which tool for which simulation

Note: XTK, HyperLynx and SpectraQuest are a few of our available tools.

Step 4: Models
Steps Without models that have been validated any kind of simulation is questionable. What format will be used for modeling:

  • IBIS
  • XTK
  • Spice
  • And more

Are models limited to drivers and receivers? Are a more complete list of components like diodes, connectors and any device playing a role in the outcome being critiqued?

Goal: Agreement on the model format type, availability and validity of each component being evaluated

Step 5: Objectives
Steps Having consensus on the SI effects being evaluated is important.

  • Overshoot / Undershoot
  • Crosstalk
  • Timing
  • And more

Having consensus on the methodology being implemented based on SunMan’s experience and the customer’s experience and expectations is critical.

Goal: Check lists are constructed for pre-route and post-route simulations associated with topology, the models, tools, methodology, and objectives.

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